Skip to content
On this page:OverviewPublicationsResearchersKey papersJournalsOpen accessInstitutions
PICO Portalanswers from OpenAlex

Low-power high-performance VLSI design

TopicLeading institutions, researchers & key papers

Low-power high-performance VLSI design is a topic indexed in PICO Portal from OpenAlex.

What is known about Low-power high-performance VLSI design?

PICO Portalrecord summary

This cluster of papers focuses on the design and optimization of low-power VLSI circuits, with an emphasis on techniques such as approximate computing, subthreshold operation, and leakage reduction. The papers also address challenges related to process variation, statistical timing analysis, and energy efficiency in CMOS technology at the nanometer scale.

How many works does Low-power high-performance VLSI design have?

PICO Portalindexed works

Low-power high-performance VLSI design has 33 works in the PICO Portal index. The count is the OpenAlex total, not the number of papers listed on this page.

What is the OpenAlex record for Low-power high-performance VLSI design?

PICO Portalopenalex

The OpenAlex for Low-power high-performance VLSI design is on the source record.

What are the most-cited papers on Low-power high-performance VLSI design?

PICO Portalmost cited works
A 45-nm single-port and dual-port SRAM family with robust read/write stabilizing circuitry under DVFS environment
Koji Nii, Makoto Yabuuchi, Yasumasa Tsukamoto, S. Ohbayashi, Y. Oda, Keiichi Usui, Takeshi Kawamura, Nobuo Tsuboi, T. Iwasaki, Kazuhito Hashimoto, Hiroshi Makino, Hirofumi Shinohara
2008114 Citations
Designing Asynchronous Circuits using NULL Convention Logic (NCL)
Scott C. Smith, Jia Di
Synthesis lectures on digital circuits and systems. 2009103 CitationsOPEN ACCESS
Optimization of NULL convention self-timed circuits
Scott C. Smith, Ronald F. DeMara, J.S. Yuan, D. Ferguson, David Lamb
Integration. 200498 CitationsOPEN ACCESS
Uncle - An RTL Approach to Asynchronous Design
R.B. Reese, Scott C. Smith, Mitchell A. Thornton
201275 Citations
Delay-insensitive gate-level pipelining
Scott C. Smith, Ronald F. DeMara, J.S. Yuan, M. Hagedorn, D. Ferguson
Integration. 200170 CitationsOPEN ACCESS

Where is Low-power high-performance VLSI design research published, and who funds it?

PICO Portalvenues & funding sources

TOP FUNDERS

National Science Foundation—
NIH—
Wellcome Trust—
European Research Council—
Funder breakdown is a member featureSign up free to unlock

How much of the research on Low-power high-performance VLSI design is open access?

PICO Portalopen access share
29%OPEN ACCESS
Gold
7%
Green
14%
Hybrid
0%
Bronze
7%
Closed
71%

Related on PICO Portal

470M+ articles · 14-day free trial