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A high utilization rate routing algorithm for modern FPGA

PaperCitations, authors & open-access status

A high utilization rate routing algorithm for modern FPGA is a paper indexed in PICO Portal from OpenAlex.

How many citations does A high utilization rate routing algorithm for modern FPGA have?

PICO Portalcitation count

A high utilization rate routing algorithm for modern FPGA has 2 citations in the OpenAlex counts PICO Portal stores.

When was A high utilization rate routing algorithm for modern FPGA published?

PICO Portalyear

A high utilization rate routing algorithm for modern FPGA has 2008 year in the PICO Portal index.

What is the open-access status of A high utilization rate routing algorithm for modern FPGA?

PICO Portaloa status

A high utilization rate routing algorithm for modern FPGA has closed oa status in the PICO Portal index.

What is the DOI of A high utilization rate routing algorithm for modern FPGA?

PICO Portaldoi

The DOI for A high utilization rate routing algorithm for modern FPGA is on the source record.

What is the OpenAlex record for A high utilization rate routing algorithm for modern FPGA?

PICO Portalopenalex

The OpenAlex for A high utilization rate routing algorithm for modern FPGA is on the source record.

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